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  vishay siliconix sip41101 document number: 72377 s-82822-rev. c, 24-nov-08 www.vishay.com 1 half-bridge n-channel mosfet driver with break-before-make features ? 5 v gate drive ? undervoltage lockout ? sub 1 gate drivers ? internal bootstrap diode ? drive mosfets in 4.5 v to 30 v systems ? switching frequency: 250 khz to 1 mhz ? synchronous enable/disable option applications ? multi-phase dc-to-dc ? high current synchro nous buck converters ? high frequency synchronous buck converters ? asynchronous-to-synchronous adaptations ? mobile computer dc-to-dc converters ? desktop computer dc-to-dc converters description the sip41101 is a high speed half-bridge driver, with make-before-break, for use in high frequency, high current multiphase dc-to-dc power supplies for supply voltages as high as 30 v. it is designed to operate at frequencies up to 1 mhz. the high-side driver is bootstrapped to allow driving an n-channel high-side mosf et. the bootstrap diode is internal. the output drivers provide currents up to 4 a, allowing use of low r ds(on) power mosfets. the sip41101 comes with internal break-before-make circuitry to prevent shoot-th rough current in the external mosfets. the sd control pin is provided to enable the drivers. a synchronous enabl e control pin is provided to disable the the low-side or synchronous mosfet to maximize efficiency under low output current conditions. the sip41101 is available in both standard and lead (pb)-free 16-pin tssop packa ges for operation over the industrial temperature range of - 40 to 85 c. typical application circuit controller in sync_en sd gnd v dd v out gnd gnd + 5 v + 5 to 30 v boot out h s h s l out l sip41101
www.vishay.com 2 document number: 72377 s-82822-rev. c, 24-nov-08 vishay siliconix sip41101 notes: a. device mounted with all leads soldered or welded to pc board. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings all voltages referenced to gnd = 0 v parameter limit unit v dd 7 v v in - 0.3 to v dd + 0.3 v sh 30 v boot v sh + 7 storage temperature - 40 to 150 c operating junction temperature 125 power dissipation a tssop-16 925 mw thermal impedance ( ja ) a 135 c/w recommended operating range all voltages referenced to gnd = 0 v parameter limit unit v dd 4.5 v to 5.5 v v v boot 4.5 v to 30 v c boot 100 nf to 1 f operating temperature range - 40 to 85 c specifications a parameter symbol test conditions unless specified v dd = 4.5 v to 5.5 v, v boot = 4.5 to 30 v, t a = - 40 to 85 c limits unit min. a typ. b max. a power supplies supply voltage v dd 4.5 5.5 v supply current i dd f in = 300 khz, sd = h, sync_en = h see figure 1 25 40 ma quiescent current i ddq in = l, sd = h, sync_en = h, no load 1.4 2.5 reference voltage break-before-make v bbm v dd = 5.5 v 2.5 v logic inputs - in, sync en, sd input high v ih 2.5 v input low v il 1.0 undervoltage lockout v dd undervoltage v uvl v dd rising 2.5 3.6 4.4 v undervoltage hysteresis v hyst 400 mv bootstrap diode forward voltage v f i f = 10 ma 0.65 v mosfet drivers high side drive current c i pkh(source) v boot - v sh = 4.5 v, v outh - v sa = 2.25 v 3.0 a i pkh(sink) 3.0 low side drive current c i pkl(source) v dd = 4.5 v, v outl = 2.25 v 4.1 i pkl(sink) 4.1 high side driver impedance r dh(source) v dd = 4.5 v sh = gnd 0.75 1.3 r dh(sink) 0.75 1.3 low side driver impedance r dl(source) v dd = 4.5 v 0.55 1.1 r dl(sink) 0.55 1.1
document number: 72377 s-82822-rev. c, 24-nov-08 www.vishay.com 3 vishay siliconix sip41101 notes: a. the algebraic convention whereby the mo st negative value is a minimum and the most positive a maximum (- 40 to 85 c). b. typical values are for design aid only, not guaranteed nor subject to production testing. c. guaranteed by design. timing waveforms test setup specifications a parameter symbol test conditions unless specified v dd = 4.5 v to 5.5 v, v boot = 4.5 to 30 v, t a = - 40 to 85 c limits unit min. a typ. b max. a mosfet drivers high-side rise time c t rh 10 % - 90 % 15 ns high-side fall time c t fh 90 % - 10 % 15 high side propagation delay c t d(off)h 50 % - 50 % 25 th-l 5 low-side rise time c t rl 10 % - 90 % 25 low-side fall time c t fl 90 % - 10 % 15 low side propagation delay c t d(off)l 50 % - 50 % 10 tl-h 25 t d(off)h t h-l t d(off)l t l-h in out h out l figure 1. in sync_en sd gnd v dd gnd v dd boot out h s h s l out l v dd 5 nf 2 nf 1 1.5
www.vishay.com 4 document number: 72377 s-82822-rev. c, 24-nov-08 vishay siliconix sip41101 pin configuration, ordering information, and truth table 16 15 14 13 1 2 3 4 12 11 10 9 5 6 7 8 in v dd nc gnd v dd sync_en nc sd boot s l nc out l out h nc s h top view nc sip41101 (tssop-16) ordering information part number temperature range marking SIP41101DQ-T1 - 40 to 85 c 41101 SIP41101DQ-T1-e3 eval kit temperature range sip41101db - 40 to 85 c truth table sd sync_en in out h out l hh l l h hh h h l hl l l l hl h h l lx x l l pin description pin name function 1 in input signal to the mosfet drivers 2 gnd ground 3 sync_en synchronous mosfet enable 4sd shutdown 5 s l connection to source of low-side mosfet 6 out l synchronous or low-side mosfet gate drive 7, 8, 11, 13, 15 nc no connect 9 s h connection to source of high-side mosfet 10 out h control or high-side mosfet gate drive 12 boot connection for the bootstrap capacitor 14, 16 v dd + 5 v supply
document number: 72377 s-82822-rev. c, 24-nov-08 www.vishay.com 5 vishay siliconix sip41101 functional block diagram detailed operation break-before-make function the sip41101 has an internal break-before-make function to ensure that both high-side and low-side mosfets are not turned on at the same time. the high-side drive (out h ) will not turn on until the low-side gate drive voltage (measured at the out l pin) is less than v bbm , thus ensuring that the low-side mosfet is turned off. the low-side drive (out l ) will not turn on until the volt age at the mosfet half-bridge output (measured at the s l pin) is less than v bbm , thus ensuring that the high-side mosfet is turned. under voltage lockout function the sip41101 has an internal under-voltage lockout feature to prevent driving the mo sfet gates when the supply voltage (at v dd ) is less than the under-voltage lockout specification (v uvl ). this prevents the output mosfets from being turned on without sufficient gate voltage to ensure they are fully on. there is hyst eresis included in this feature to prevent lockout fr om cycling on and off. typical characteristics 25 c, unless otherwise noted figure 2. in sd gnd v dd out h s h s l out l v dd boot v bbm - + undervoltage levelshift sync en i dd supply current vs. frequency 100 10 500 100 20 1000 200 ) a m ( t n e r r u c frequency (khz) 50 rise and fall time vs. c load 0.3 10 1 ) s n ( s e m i t l l a f d n a e s i r load capacitance (nf) t r(outl) t f(outh) t f(outl) 3 50 40 30 20 10 0 t r(outh)
www.vishay.com 6 document number: 72377 s-82822-rev. c, 24-nov-08 vishay siliconix sip41101 typical waveforms vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?72377. v in rising vs. sh v in rising vs. out h and out l sd vs. out l 25 ns/div v in , 2 v/div s h , 5 v/div 25 ns/div v in , 2v/div out h , 10 v/div out l , 5 v/div 400 ns/div sd , 2 v/div out l , 5 v/div v in falling vs. sh v in falling vs. out h and out l sync en vs. out l v in , 2 v/div s h , 5 v/di v 25 ns/div 25 ns/div v in , 2 v/div out h , 10 v/div out l , 5 v/div 50 ns/div sync en, 2 v/div out l , 2 v/div
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.


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